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  datashee t product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 1/75 ? 2013 rohm co., ltd. all rights reserved. 8.apr.2014 rev.001 www.rohm.com tsz02201-0q4q0ab00010-1-2 power management lsi for mobile phone BD7185AGWL general description the BD7185AGWL is an integrated power management lsi available in a small 80- pins 0.4mm-pitch 3.8mm-by- 3.8mm wafer-level csp package, which is designed to meet demands for space-constrained smart phones. the device provides 5-buck converters. the device also includes 12 general-purpose ldos providing a wide range of voltage and current capabilities. all buck converters and ldos are fully controllable by the i2c interface. the BD7185AGWL is very easy to use in any mobile platforms. features ? 5-channel high-efficiency buck converters (16-step adjustable v o by i 2 c) ? 12-channel cmos-type ldo (16-step adjustable v o by i 2 c) ? ldo and buck converter power on/off control by i 2 c interface or external pin. ? power on/off sequence. ? 32.768khz osc and output buffer. ? 4-to-1 analog switch. ? tcxo buffer. ? sim card i/f ? i 2 c compatible interface. ? i 2 c device address changeable by adrs pin. (device address is ?1001011?,?1001100?) ? small and thin csp package (3.8mm x 3.8mm height 0.57mm max) applications ? smart phones ? tablets ? mobile router ? data transmitter key specifications ? input voltage range: 2.6v to 5.5v ? output voltage range: 1.0v to 3.4v ? switching frequency: 2.0mhz(typ) ? off current: 0.3 a (typ) ? operating temper ature range: -35 to +85 package w(typ) x d(typ) x h(max) ucsp50l3c 3.80mm x 3.80mm x 0.57mm
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 2/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 absolute maximum ratings ta= 25 ? c parameter symbol rating unit maximum supply voltage 1 (vbatref,vbat, vin1) vbatmax 7.0 v maximum supply voltage 2 (pbat1,2,3,4,5) vpbatmax 7.0 v maximum supply voltage 3 (vin2 ) vin2max 4.2 v maximum input voltage 1 (out1, out2, out3, out4, out5, out6, out7, out8, out9, out10, lx1, lx2, lx3, lx4, lx5, pset, adrs, en_o7, pwron, pwrhold, por, tcxo_in, osc_in, dvdd (note 1) osc_out, simrstin, simclkin, simiodbb, simio) vinmax1 7.0 v maximum input voltage 2 (sda, scl) vinmax2 dvdd + 0.3 v maximum input voltage 3 (out11,12, refc) vinmax3 vin2max+ 0.3 v power dissipation pd 1.38 (note 2) w operating temperature range topr -35 +85 ? c storage temperature range tstg -55 +125 ? c (note 1) the dvdd voltage must be under the battery voltage vbat, pbat anytimes. (note 2) this is an allowable loss of the rohm evaluation board (54mm62mm). .when a substrate is implemented, the allowable l oss varies from the size and material of the substrate. derate 1% per c for temperatures higher than 25c. caution : operating the ic over the absolute maximum ratings may damage the ic. the damage can either be a short circuit between pins o r an open circuit between pins and the internal circuitry. therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the ic is operated over the absolute maximum ratings. recommended operating conditions (ta=25 ? c) parameter symbol range unit vbat voltage vbat 2.70 hz 5.50 (note3) v pbat voltage vpbat 2.70 hz 5.50 (note3) v vin1 voltage vin1 2.70 hz 5.50 (note4) v vin2 voltage vin2 1.40 hz 1.80 (note5) v (note 3) whenever vbat, pbat, vin1, or vin2 falls below the ldo or swreg output voltage, or below certain levels, ldo and swreg output is not guaranteed to meet the published specifications. it is necessary to supply the same voltage to vbat and pbat. (note 4) it is recommended to connect swreg5 output to vin1 to maximize efficiency. ( note 5 ) it is recommended to connect swreg4 output to vin2 to maximize efficienc y .
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 3/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 block diagram swreg1 1.20v vbat vin1 gnd ldo1 2.60v or 1.80v ldo2 3.30v ldo3 1.80v ldo4 2.80v out1 out2 out3 out4 300ma 50ma 50ma 300ma 1a 1uf 1uf 1uf 1uf ref refc 0.1uf i 2 c if sda scl dvdd i2c master digital power out1 data clk vdd pbat1 fb1 pgnd1 lx1 10uf 10uf 2.2uh ldo5 1.20v ldo6 2.80v ldo7 2.80v ldo8 2.50v out5 out6 out7 out8 150ma 50ma 150ma 150ma 1uf 1uf 1uf 1uf ldo9 2.80v ldo10 2.80v ldo11 1.20v ldo12 1.20v out9 out10 out11 out12 150ma 150ma 150ma 150ma 2.2uf 2.2uf 1uf 1uf swreg2 1.80v 500ma pbat2 fb2 pgnd2 lx2 10uf 10uf 2.2uh swreg3 1.20v 500ma pbat3 fb3 pgnd3 lx3 10uf 10uf 2.2uh swreg4 1.40v 500ma pbat4 fb4 pgnd4 lx4 10uf 10uf 2.2uh power sequencer pwron pwrhold por vin1 for i/o for usb for sim i/f for tcxo for 2.5v r/f for lna for hkadc for rx pll for tx pll en_o7 tcxo buffer tcxo_in tcxo_out 32.768khz osc osc_in osc_out c32kout sim card i/f simrstout simclkout simio simrstin simclkin simiodbb pset vbatref gndref gndosc vddosc vddtxco corner balls 80 balls gndtcxo tcxo vin1 0.1uf swreg5 3.20v 1.4a pbat5 fb5 pgnd5 lx5 10uf 10uf 2.2uh 1uf 1uf 1uf vin2 1uf connect to out1 adrs aswin1 aswout aswin2 aswin4 aswin3 connect to out7 0.1uf connect to out1 for pll vin1 1uf swreg5 built in bypass mode default=on detect voltage=3.35v (refer to page61) ldo1 initial output voltage 1.8v (pset=l) 2.6v (pset=h) tcxo_out wakes up 530usec from en_07=h 5pf i2c address 1001011 (adrs=l) 1001100 (adrs=h) figure 1. block diagram (note1) recommend parts 1. coil : swreg2, swreg3, swreg4 dfe201612r-h-2r2n ( toko ) swreg1, swreg5 dfe252012r-h-2r2n ( toko) 2. x?tal : fc135 ( epson toyocom ) cm7v-t1a ( micro crystal switzerland )
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 4/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 pin configuration out4 out5 vin1 vin1 gnd tcxo vdd tcxo out6 out7 vin1 vin1 osc_ out osc_ in refc vin2 aswin 4 aswin 3 c32k out vdd osc aswin 1 vbat vbat ref asw out pbat5 pbat5 tcxo_ out tcxo_ in por en_o7 pwron lx5 lx5 pgnd5 pgnd5 pbat4 pbat3 fb5 pwr hold simrst in aswin 2 simrst out simclk in simio bb simclk out simio fb3 pbat2 pset adrs fb2 fb1 sda scl out11 out3 out2 dvdd gnd pgnd1 lx1 lx4 pgnd4 lx3 pgnd3 lx2 pgnd2 pbat1 123456789 a b c d e f g h fb4 out8 out9 out10 out1 gnd osc gnd ref out12 j bottom view figure 2. pin configuration
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 5/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 pin description + side - side a1 test1 - - - non connect pin (open or connected to gnd.) vbat gnd - (note6) a2 lx4 a o a inductor connection for swreg4 pbat4 pgnd4 hiz a3 pgnd4 - - - ground for swreg4 pbat4 gnd - a4 lx3 a o a inductor connection for swreg3 pbat3 pgnd3 hiz a5 pgnd3 - - - ground for swreg3 pbat3 gnd - a6 lx2 a o a inductor connection for swreg2 pbat2 pgnd hiz a7 pgnd2 - - - ground for swreg2 pbat2 gnd - a8 pbat1 - - - power supply for swreg1 - pgnd1 - a9 test2 - - - non connect pin (open or connected to gnd) vbat gnd - (note6) b1 lx5 a o a inductor connection for swreg5 pbat5 pgnd5 hiz b2 lx5 a o a inductor connection for swreg5 pbat5 pgnd5 hiz b3 pbat4 - - - power supply for swreg4 - pgnd4 - b4 pbat3 - - - power supply for swreg3 - pgnd3 - b5 fb3 a i/o b voltage feed back pin for swreg3 pbat3 gnd - b6 pbat2 - - - power supply for swreg2 - pgnd2 - b7 fb2 a i/o b voltage feed back pin for swreg2 pbat2 gnd - b8 fb1 a i/o b voltage feed back pin for swreg1 pbat1 gnd - b9 pgnd1 - - - ground for swreg1 pbat1 gnd - c1 pgnd5 - - - ground for swreg5 pbat5 gnd - c2 pgnd5 - - - ground for swreg5 pbat5 gnd - c3 fb5 a i/o b voltage feed back pin for swreg5 pbat5 gnd - c4 fb4 a i/o b voltage feed back pin for swreg4 pbat4 gnd - c5 pset d i c ldo1 initial voltage set pin (l=1.8v, h=2.6v) pbat3 gnd - connect to gnd c6 adrs d i c logic selector pbat4 gnd - i2c address 1001011 (adrs=l) 1001100 (adrs=h) c7 sda d i d i2c data input vbat gnd - c8 scl d i e i2c clock input vbat gnd - c9 lx1 a o a inductor connection for swreg1 pbat1 pgnd1 hiz function diode a/d i/o equivalent circuit eiqure ball no. pin name initial condition function (note 6) test1, test2, te st3, test4, test5 and test6 are used for factory te st mode. please keep these pins open or connected t o gnd at all times.
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 6/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 + side - side d1 pbat5 - - - power supply for swreg5 - pgnd5 - d2 pbat5 - - - power supply for swreg5 - pgnd5 - d3 por d o f power on reset signal output vbat gnd l (note7) d5 pwrhold d i g power enable signal vbat gnd - d6 simrstin d i h sim clock input from dbb vbat gnd - d7 simclkin d i h sim reset input from dbb vbat gnd - d8 simiobb d i/o i sim data input / output from dbb vbat gnd - pull up 20k to out1 d9 dvdd - - - vdd for i2c block vbat gnd - e1 tcxo_out d o k tcxo_buffer input frequency vddtcxo gnd l e2 tcxo_in a i j tcxo_buffer output frequency vbat gnd - e3 en_07 d i l tcxo buffer,swreg4, ldo7,8,11,12 control vbat gnd pull down pull down 1.5m e4 pwron d i l start up signal input vbat gnd pull down pull down 1.5m e5 aswin2 a i m analog sw input selector2 vbat gnd - e6 simrstout d o n sim card side reset output vbat out3 gnd l e7 simclkout d o n sim card side clock output vbat out3 gnd l e8 simio d i/o i sim card side data input/output vbat gnd pull up pull up 10k to out3 e9 gnd - - - ground pin vbat - - f1 gndtcxo - - - ground for tcxo buffer vbat gnd - f2 vddtcxo - - - power supply for tcxo buffer - gnd - f3 test5 - - - non connect pin (open or connected to gnd.) vbat gnd - (note6) f4 test6 - - - non connect pin (open or connected to gnd.) vbat gnd - (note6) f5 aswin4 a i m analog sw input selector4 vbat gnd - f6 aswin3 a i m analog sw input selector3 vbat gnd - f7 aswin1 a i m analog sw input selector1 vbat gnd - f8 vbat - - - power supply for ic - gnd - f9 out3 a o o ldo3 output vbat gnd ball no. pin name a/d i/o equivalent circuit eiqure function diode initial condition function (note 6) test1, test2, te st3, test4, test5 and test6 are used for factory te st mode. please keep these pins open or connected t o gnd at all times. (note 7) por needs a pull-up resistance in the pcb layout.
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 7/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 + side - side g1 out6 a o p ldo6 output vin1 gnd - g2 out7 a o p ldo7 output vin1 gnd - g3 vin1 - - - power supply input for ldo - gnd - g4 vin1 - - - power supply input for ldo vbat gnd - g5 c32kout a o q 32.768khz output vbat gnd - g6 vddosc - - - power supply for rtc block - gnd - g7 vbatref - - - power supply for reference block - gnd - g8 aswout a o m analog sw selector output vbat gnd - g9 out2 a o o ldo2 output vbat gnd - h1 out4 a o p ldo4 output vin1 gnd - h2 out5 a o p ldo5 output vin1 gnd - h3 vin1 - - - power supply input for ldo vbat gnd - h4 vin1 - - - power supply input for ldo vbat gnd - h5 osc_out a i/o r 32.768khz crystal connect terminal - gnd - h6 osc_in a i/o r 32.768khz crystal connect terminal - gnd - h7 refc a o s reference voltage output vbat gnd - h8 vin2 - - - power supply input for ldo vbat gnd - h9 out11 a o t ldo11 output vin2 gnd - j1 test4 - - - non connect pin (open or connected to gnd.) vbat gnd - (note6) j2 out8 a o p ldo8 output vin1 gnd - j3 out9 a o p ldo9 output vin1 gnd - j4 out10 a o p ldo10 output vin1 gnd - j5 out1 a o p ldo1 output vin1 gnd - j6 gndosc - - - gnd for rtc block vbat - - j7 gndref - - - ground for reference block vbat - - j8 out12 a o t ldo12 output vin2 gnd - j9 test3 - - - non connect pin (open or connected to gnd.) vbat gnd - (note6) equivalent circuit eiqure function diode initial condition function ball no. pin name a/d i/o (note 6) test1, test2, te st3, test4, test5 and test6 are used for factory te st mode. please keep these pins open or connected t o gnd at all times.
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 8/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 i/o equivalence circuits figure 3. i/o equivalence circuits
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 9/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 figure 4. i/o equivalence circuits
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 10/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 q r osc_in osc_out vbat s vbat t vin2 refc vin2 vddosc vbat figure 5. i/o equivalence circuits
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 11/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 initial output voltage summary usage example power supply initial output voltage max load adjustable range swreg1 core pbat1 1.20v 1.0a 50,100mv swreg2 memory pbat2 1.80v 0.5a 50,100mv swreg3 analog pbat3 1.20v 0.5a 50,100mv swreg4 vin2 power supply (efficiency improvement) pbat4 1.40v 0.5a 50,100mv swreg5 vin1 power supply (efficiency improvement) pbat5 3.20v 1.4a 50,100mv ldo1 i/o vin1 2.60v / 1.80v (note 8) 300ma 50,100mv ldo2 usb vbat 3.30v 50ma 50,100mv ldo3 sim i/f vbat 1.80v 50ma 50,100mv ldo4 reserved vin1 2.80v 300ma 50,100mv ldo5 sys pll vin1 1.20v 150ma 50,100mv ldo6 reserved vin1 2.80v 150ma 50,100mv ldo7 tcxo vin1 2.80v 50ma 50,100mv ldo8 2.5v r/f vin1 2.50v 150ma 50,100mv ldo9 lna vin1 2.80v 150ma 50,100mv ldo10 hkadc vin1 2.80v 150ma 50,100mv ldo11 rx pll vin2 1.20v 150ma 50,100mv ldo12 tx pll vin2 1.20v 150ma 50,100mv (note 8) initial output voltage depends on pset pin setting. swreg output voltage step table swreg1 swreg2 swreg3 swreg4 swreg5 1.00 1.00 1.00 1.00 1.20 1.05 1.05 1.05 1.05 1.40 1.10 1.10 1.10 1.10 1.70 1.15 1.15 1.15 1.15 1.75 1.20 1.20 1.20 1.20 1.80 1.25 1.25 1.25 1.25 1.85 1.30 1.30 1.30 1.30 1.90 1.35 1.35 1.35 1.35 3.00 1.40 1.40 1.40 1.40 3.05 1.45 1.45 1.45 1.45 3.10 1.50 1.50 1.50 1.50 3.15 1.70 1.70 1.70 1.70 3.20 1.75 1.75 1.75 1.75 3.25 1.80 1.80 1.80 1.80 3.30 1.85 1.85 1.85 1.85 3.35 1.90 1.90 1.90 1.90 3.40 ldo1 ldo2 ldo3 ldo4 ldo5 ldo6 ldo7 ldo8 ldo9 ldo10 ldo11 ldo12 1.70 2.55 1.70 1.10 1.00 1.10 1.10 1.20 1.10 1.10 1.00 1.00 1.75 2.60 1.75 1.20 1.05 1.20 1.20 1.30 1.20 1.20 1.05 1.05 1.80 2.65 1.80 1.30 1.10 1.30 1.30 1.70 1.30 1.30 1.10 1.10 1.85 2.75 1.85 1.70 1.15 1.70 1.70 1.80 1.70 1.70 1.15 1.15 1.90 2.80 1.90 1.80 1.20 1.80 1.80 2.40 1.80 1.80 1.20 1.20 2.50 2.85 2.50 1.90 1.25 1.90 1.90 2.45 1.90 1.90 1.25 1.25 2.55 2.90 2.60 2.50 1.30 2.50 2.50 2.50 2.50 2.50 1.30 1.30 2.60 2.95 2.70 2.55 1.70 2.55 2.55 2.55 2.55 2.55 1.35 1.35 2.65 3.00 2.80 2.60 1.80 2.60 2.60 2.60 2.60 2.60 2.70 3.05 2.90 2.65 1.90 2.65 2.65 2.65 2.65 2.65 2.80 3.10 2.95 2.70 2.60 2.70 2.70 2.70 2.70 2.70 2.90 3.20 3.00 2.75 2.70 2.75 2.75 2.75 2.75 2.75 2.95 3.25 3.05 2.80 2.80 2.80 2.80 2.80 2.80 2.80 3.00 3.30 3.10 2.85 2.90 2.85 2.85 2.85 2.85 2.85 3.05 3.35 3.20 2.90 3.00 2.90 2.90 2.90 2.90 2.90 3.10 3.40 3.30 3.00 3.10 3.00 3.00 3.00 3.00 3.00 voltage step [v] voltage step [v]
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 12/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 power on sequence figure 6. power on sequence (start factor is pwron) the short detection circuit is built in the swreg1,2,3,4 and 5 outputs. when the output shorted state continued more than 100ms, the all ldo and swreg will be off. if the ldo and swreg are turned off by the external pin (en_o7) or i2c command, the short detection circuit is not detected. the swreg1, 2, 3, and 4 must be used external parts when not used swreg?s output voltage. if it is not used the external parts in these swreg, the short detector will detect when running the start up sequence. (it is possible when these swreg turn off by the i2c command after start up sequence.)
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 13/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 power off sequence figure 7. power off sequence
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 14/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 electrical characteristics (current consumption) (unless otherwise specified, ta=25 ? c, vbat=pbat1, 2, 3, 4, 5=vin1=vin2=3.6v, dvdd=vddosc=out1) parameter symbol min typ max unit condition circuit current vbat circuit current 1 (off) iqvb1 - 0.3 1.0 a all ldo=off all swreg=off dvdd=0v pwron=l pwrhold=l vbat circuit current 2 (sleep) iqvb2 - 195 330 a pwron=h pwrhold=h ldo1,2,5=on swreg1,2,5=on por=h all swreg=pfm/pwm auto mode all ldo,swreg=no load 32khz buffer=on vbat circuit current 3 (rx-only) iqvb3 - 500 1000 a pwron=h pwrhold=h ldo1,2,3,4,5,7,8,9,10,11=on swreg1,2,3,4,5=on por=h all swreg=pfm/pwm auto mode all ldo, swreg=no load vbat circuit current 4 (lte link) iqvb4 - 550 1100 a pwron=h pwrhold=h ldo1,2,3,4,5,7,8,9,10,11,12=on swreg1,2,3,4,5=on por=h all swreg=pfm/pwm auto mode all ldo, swreg=no load
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 15/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 electrical characteristics (logic interface) (unless otherwise specified, ta=25 ? c, vbat=pbat1, 2, 3, 4, 5=vin1=vin2=3.6v, dvdd=out1) rating parameter symbol min typ max unit conditions digital characteristics (digital pins: en_o7, pwron as nmos input) input "h" level vih1 1.44 - - v input "l" level vil1 - - 0.4 v pull down resistance rpd1 - 1.5 - m ? pwron, en_o7 digital characteristics (digital pins: scl, sda, pwrhold) input "h" level vih2 0.7 dvdd - dvdd+0.3 v input "l" level vil2 -0.3 - 0.3 dvdd v input leak current iic2 -1 0 1 a digital characteristics (digital pins: pset, adrs) input "h" level vih3 0.7 vbat - vbat+ 0.3 v input "l" level vil3 -0.3 - 0.3 vbat v input leak current iic3 -1 0 1 a digital characteristics (digital pins: sda, por) sda output ?l? level voltage vol1 - - 0.4 v iol=6ma por output ?l? level voltage vol2 - - 0.4 v iol=1ma electrical characteristics (32 khz buffer) ( unless otherwise specified, ta=25 ? c, vbat=pbat1, 2, 3, 4, 5=vin1=vin2=3.6v, dvdd=vddosc=out1) rating parameter symbol min typ max unit conditions digital characteristics (digital pins: c32kout) c32kout output high level voh_ 32k 0.8 out1 - - v io=-2ma c32kout output low level vol_32k - - 0.2 out1 v io=2ma 32.768khz duty duty 30 50 70 %
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 16/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 electrical characteristics (swreg1) (unless otherwise specified, ta=25 ? c, vbat=pbat*=3.6v, vin1=3.2v(fb5), vin2=1.4v(fb4), dvdd=out1) parameter symbol min typ max unit condition swreg1 output voltage vosw1 1.164 1.200 1.236 v initial value io=100ma vosw10 1.10 vosw11 1.15 vosw12 1.25 programmable output voltage vosw13 -3% 1.30 +3% v io=100ma output current iosw1 - - 1000 ma efficiency sw1 - 86 - % io=400ma, vo=1.20v, vbat=3.6v oscillating frequency fosc1 - 2.0 - mhz vo=1.20v (pwm mode, io=100ma) output inductance lswreg1 1.5 2.2 - h ta= -35 to +85 ? c output capacitance cswreg1 4.7 10 - f ta= -35 to +85 ? c, with swreg's dc bias electrical characteristics (swreg2) (unless otherwise specified, ta=25 ? c, vbat=pbat*=3.6v, vin1=3.2v(fb5), vin2=1.4v(fb4), dvdd=out1) parameter symbol min typ max unit condition swreg2 output voltage vosw2 1.746 1.800 1.854 v initial value io=100ma vosw20 1.70 vosw21 1.75 vosw22 1.85 programmable output voltage vosw23 -3% 1.90 +3% v io=100ma output current iosw2 - - 500 ma efficiency sw2 - 86 - % io=200ma, vo=1.80v, vbat=3.6v oscillating frequency fosc2 - 2.0 - mhz vo=1.80v (pwm mode, io=100ma) output inductance lswreg2 1.5 2.2 - h ta= -35 to +85 ? c output capacitance cswreg2 4.7 10 - f ta= -35 to +85 ? c, with swreg's dc bias
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 17/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 electrical characteristics (swreg3) (unless otherwise specified, ta=25 ? c, vbat=pbat*=3.6v, vin1=3.2v(fb5), vin2=1.4v(fb4), dvdd=out1) parameter symbol min typ max unit condition swreg3 output voltage vosw3 1.164 1.200 1.236 v initial value io=100ma vosw30 1.10 vosw31 1.15 vosw32 1.25 programmable output voltage vosw33 -3% 1.30 +3% v io=100ma output current iosw3 - - 500 ma efficiency sw3 - 86 - % io=200ma, vo=1.20v, vbat=3.6v oscillating frequency fosc3 - 2.0 - mhz vo=1.20v (pwm mode, io=100ma) output inductance lswreg3 1.5 2.2 - h ta= -35 to +85 ? c output capacitance cswreg3 4.7 10 - f ta= -35 to +85 ? c, with swreg's dc bias electrical characteristics (swreg4) (unless otherwise specified, ta=25 ? c, vbat=pbat*=3.6v, vin1=3.2v(fb5), vin2=1.4v(fb4), dvdd=out1) parameter symbol min typ max unit condition swreg4 output voltage vosw4 1.358 1.400 1.442 v initial value io=100ma vosw40 1.50 vosw41 1.45 vosw42 1.35 programmable output voltage vosw43 -3% 1.30 +3% v io=100ma output current iosw4 - - 500 ma efficiency sw4 - 87 - % io=200ma, vo=1.40v, vbat=3.6v oscillating frequency fosc4 - 2.0 - mhz vo=1.40v (pwm mode, io=100ma) output inductance lswreg4 1.5 2.2 - h ta= -35 to +85 ? c output capacitance cswreg4 4.7 10 - f ta= -35 to +85 ? c, with swreg's dc bias
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 18/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 electrical characteristics (swreg5) (unless otherwise specified, ta=25 ? c, vbat=pbat*=3.6v, vin1=3.2v(fb5), vin2=1.4v(fb4), dvdd=out1) parameter symbol min typ max unit condition swreg5 output voltage vosw5 3.104 3.200 3.296 v initial value io=100ma vosw50 3.300 vosw51 3.250 vosw52 3.150 programmable output voltage vosw53 -3% 3.100 +3% v io=100ma output current iosw5 - - 1400 ma efficiency sw5 - 92 - % io=400ma, vo=3.20v, vbat=3.6v oscillating frequency fosc5 - 2.0 - mhz vo=3.20v (pwm mode, io=100ma) output inductance lswreg5 1.5 2.2 - h ta= -35 to +85 ? c output capacitance cswreg5 4.7 10 - f ta= -35 to +85 ? c, with swreg's dc bias
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 19/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 electrical characteristics (ldo1) (unless otherwise specified, ta=25 ? c, vbat=pbat*=3.6v, vin1=3.2v(fb5), vin2=1.4v(fb4), dvdd=out1) parameter symbol min. typ. max. unit condition ldo1 output voltage a vom1a0 2.548 2.600 2.652 v initial setting, pset=h io=50ma output voltage b vom1b0 1.764 1.800 1.836 v initial setting, pset=l io=50ma output current vom1c - - 300 ma dropout voltage vom1dp - 0.05 - v io=50ma vin1=2.7v(vo=3.1v setting) input voltage stability vim1 - 2 - mv vin1=3v to 4.5v, io=50ma load stability vlm1 - 20 - mv io=1ma ~ 300ma vom1a1 2.70 vom1a2 2.65 vom1a3 2.55 programmable output voltage a vom1a4 -2% 2.50 +2% v io=50ma vom1b1 1.90 vom1b2 1.85 vom1b3 1.75 programmable output voltage b vom1b4 -2% 1.70 +2% v io=50ma discharge resistance rdchg1 - 100 - ohm ripple rejection ratio rrm1 - 60 - db vbat=4.2v+0.2vpp fr=120hz io=50ma, vo=2.60v bw=20hz to 20khz output capacitor cout1 0.47 1.0 - f ta=-35 to +85 ? c, with ldo's dc bias
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 20/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 electrical characteristics (ldo2) (unless otherwise specified, ta=25 ? c, vbat=pbat*=3.6v, vin1=3.2v(fb5), vin2=1.4v(fb4), dvdd=out1) parameter symbol min. typ. max. unit condition ldo2 output voltage vom20 3.234 3.300 3.366 v io=50ma output current vom2c - - 50 ma dropout voltage vom2dp - 0.05 - v io=50ma vbat=2.8v(vo=3.4v setting) input voltage stability vim2 - 2 - mv vbat=3.6v to 4.5v, io=50ma load stability vlm2 - 20 - mv io=1ma ~ 50ma vom21 3.40 vom22 3.35 vom23 3.25 programmable output voltage vom24 -2% 3.20 +2% v io=50ma discharge resistance rdchg2 - 100 - ohm ripple rejection ratio rrm2 - 60 - db vbat=4.2v+0.2vpp fr=120hz io=50ma, vo=3.3v bw=20hz to 20khz output capacitor cout2 0.47 1.0 - f ta=-35 to +85 ? c, with ldo's dc bias
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 21/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 electrical characteristics (ldo3) (unless otherwise specified, ta=25 ? c, vbat=pbat*=3.6v, vin1=3.2v(fb5), vin2=1.4v(fb4), dvdd=out1) parameter symbol min. typ. max. unit condition ldo3 output voltage vom30 1.764 1.800 1.836 v io=50ma output current vom3c - - 50 ma dropout voltage vom3dp - 0.05 - v io=50ma vbat=2.8v(vo=3.3v setting) input voltage stability vim3 - 2 - mv vbat=3.3v to 4.5v, io=50ma load stability vlm3 - 20 - mv io=1ma ~ 50ma vom31 1.90 vom32 1.85 vom33 1.75 programmable output voltage b vom34 -2% 1.70 +2% v io=50ma discharge resistance rdchg3 - 100 - ohm ripple rejection ratio rrm3 - 60 - db vbat=4.2v+0.2vpp fr=120hz io=50ma, vo=3.0v bw=20hz to 20khz output capacitor cout3 0.47 1.0 - f ta=-35 to +85 ? c, with ldo's dc bias
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 22/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 electrical characteristics (ldo4) (unless otherwise specified, ta=25 ? c, vbat=pbat*=3.6v, vin1=3.2v(fb5), vin2=1.4v(fb4), dvdd=out1) parameter symbol min. typ. max. unit condition ldo4 output voltage vom40 2.744 2.800 2.856 v io=50ma output current vom4c - - 300 ma dropout voltage vom4dp - 0.05 - v io=50ma vin1=2.7v(vo=3.0v setting) input voltage stability vim4 - 2 - mv vbat=3.2v to 4.5v, io=50ma load stability vlm4 - 20 - mv io=1ma ~ 300ma vom41 2.90 vom42 2.85 vom43 2.75 programmable output voltage vom44 -2% 2.70 +2% v io=50ma discharge resistance rdchg4 - 100 - ohm ripple rejection ratio rrm4 - 60 - db vbat=4.2v+0.2vpp fr=120hz io=50ma, vo=2.80v bw=20hz to 20khz output capacitor cout4 0.47 1.0 - f ta=-35 to +85 ? c, with ldo's dc bias
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 23/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 electrical characteristics (ldo5) (unless otherwise specified, ta=25 ? c, vbat=pbat*=3.6v, vin1=3.2v(fb5), vin2=1.4v(fb4), dvdd=out1) parameter symbol min. typ. max. unit condition ldo5 output voltage vom50 1.176 1.200 1.224 v io=50ma output current vom5c - - 150 ma dropout voltage vom5dp - 0.05 - v io=50ma vin1=2.7v(vo=3.1v setting) input voltage stability vim5 - 2 - mv vin1=3.0v to 4.5v, io=50ma load stability vlm5 - 20 - mv io=1ma ~ 150ma vom51 1.30 vom52 1.25 vom53 1.15 programmable output voltage vom54 -2% 1.10 +2% v io=50ma discharge resistance rdchg5 - 100 - ohm ripple rejection ratio rrm5 - 60 - db vbat=4.2v+0.2vpp fr=10khz io=50ma, vo=1.20v bw=20hz to 20khz output noise level von5 - 60 - vrms io=50ma, vo=1.20v bw=20hz to 20khz output capacitor cout5 0.47 1.0 - f ta=-35 to +85 ? c, with ldo's dc bias
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 24/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 electrical characteristics (ldo6) (unless otherwise specified, ta=25 ? c, vbat=pbat*=3.6v, vin1=3.2v(fb5), vin2=1.4v(fb4), dvdd=out1) parameter symbol min. typ. max. unit condition ldo6 output voltage vom60 2.744 2.800 2.856 v io=50ma output current vom6c - - 150 ma dropout voltage vom6dp - 0.05 - v io=50ma vin1=2.7v(vo=3.0v setting) input voltage stability vim6 - 2 - mv vin1=3.2~4.5v, io=50ma load stability vlm6 - 20 - mv io=1ma ~ 150ma vom61 2.90 vom62 2.85 vom63 2.75 programmable output voltage vom64 -2% 2.70 +2% v io=50ma discharge resistance rdchg6 - 100 - ohm ripple rejection ratio rrm6 - 60 - db vbat=4.2v+0.2vpp fr=10khz io=50ma, vo=1.20v bw=20hz 20khz output noise level von6 - 60 - vrms io=50ma, vo=1.20v bw=20hz 20khz output capacitor cout6 0.47 1.0 - f ta = - 3 5 85 ? c, with ldo's dc bias
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 25/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 electrical characteristics (ldo7) (unless otherwise specified, ta=25 ? c, vbat=pbat*=3.6v, vin1=3.2v(fb5), vin2=1.4v(fb4), dvdd=out1) parameter symbol min. typ. max. unit condition ldo7 output voltage vom70 2.744 2.800 2.856 v io=50ma output current vom7c - - 50 ma dropout voltage vom7dp - 0.05 - v io=50ma vin1=2.7v(vo=3.0v setting) input voltage stability vim7 - 2 - mv vin1=3.2v to 4.5v, io=50ma load stability vlm7 - 20 - mv io=1ma ~ 50ma vom71 2.90 vom72 2.85 vom73 2.75 programmable output voltage vom74 -2% 2.70 +2% v io=50ma discharge resistance rdchg7 - 100 - ohm ripple rejection ratio rrm7 - 60 - db vbat=4.2v+0.2vpp fr=10khz io=50ma, vo=1.20v bw=20hz to 20khz output noise level von7 - 60 - vrms io=50ma, vo=1.20v bw=20hz to 20khz output capacitor cout7 0.47 1.0 - f ta=-35 to +85 ? c, with ldo's dc bias
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 26/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 electrical characteristics (ldo8) (unless otherwise specified, ta=25 ? c, vbat=pbat*=3.6v, vin1=3.2v(fb5), vin2=1.4v(fb4), dvdd=out1) parameter symbol min. typ. max. unit condition ldo8 output voltage vom80 2.45 2.50 2.55 v io=50ma output current vom8c - - 150 ma dropout voltage vom8dp - 0.05 - v io=50ma vin1=2.7v(vo=3.0v setting) input voltage stability vim8 - 2 - mv vin1=3.0v to 4.5v, io=50ma load stability vlm8 - 20 - mv io=1ma to 150ma vom81 2.60 vom82 2.55 vom83 2.45 programmable output voltage vom84 -2% 2.40 +2% v io=50ma discharge resistance rdchg8 - 100 - ohm ripple rejection ratio rrm8 - 60 - db vbat=4.2v+0.2vpp fr=10khz io=50ma, vo=1.20v bw=20hz to 20khz output noise level von8 - 60 - vrms io=50ma, vo=1.20v bw=20hz to 20khz output capacitor cout8 0.47 1.0 - f ta=-35 to +85 ? c, with ldo's dc bias
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 27/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 electrical characteristics (ldo9) (unless otherwise specified, ta=25 ? c, vbat=pbat*=3.6v, vin1=3.2v(fb5), vin2=1.4v(fb4), dvdd=out1) parameter symbol min. typ. max. unit condition ldo9 output voltage vom90 2.744 2.800 2.856 v io=50ma output current vom9c - - 150 ma dropout voltage vom9dp - 0.05 - v io=50ma vin1=2.7v(vo=3.0v setting) input voltage stability vim9 - 2 - mv vin1=3.2v to 4.5v, io=50ma load stability vlm9 - 20 - mv io=1ma ~ 150ma vom91 2.90 vom92 2.85 vom93 2.75 programmable output voltage vom94 -2% 2.70 +2% v io=50ma discharge resistance rdchg9 - 100 - ohm ripple rejection ratio rrm9 - 60 - db vbat=4.2v+0.2vpp fr=10khz io=50ma, vo=1.20v bw=20hz to 20khz output noise level von9 - 60 - vrms io=50ma, vo=1.20v bw=20hz to 20khz output capacitor cout9 0.47 1.0 - f ta=-35 to +85 ? c, with ldo's dc bias
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 28/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 electrical characteristics (ldo10) (unless otherwise specified, ta=25 ? c, vbat=pbat*=3.6v, vin1=3.2v(fb5), vin2=1.4v(fb4), dvdd=out1) parameter symbol min. typ. max. unit condition ldo10 output voltage vom100 2.744 2.800 2.856 v io=50ma output current vom10c - - 150 ma dropout voltage vom10dp - 0.05 - v io=50ma vin1=2.7v(vo=3.0v setting) input voltage stability vim10 - 2 - mv vin1=3.2v to 4.5v, io=50ma load stability vlm10 - 20 - mv io=1ma ~ 150ma vom101 2.90 vom102 2.85 vom103 2.75 programmable output voltage vom104 -2% 2.70 +2% v io=50ma discharge resistance rdchg10 - 100 - ohm ripple rejection ratio rrm10 - 60 - db vbat=4.2v+0.2vpp fr=10khz io=50ma, vo=1.20v bw=20hz to 20khz output noise level von10 - 60 - vrms io=50ma, vo=1.20v bw=20hz to 20khz output capacitor cout10 0.47 1.0 - f ta=-35 to +85 ? c, with ldo's dc bias
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 29/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 electrical characteristics (ldo11) (unless otherwise specified, ta=25 ? c, vbat=pbat*=3.6v, vin1=3.2v(fb5), vin2=1.4v(fb4), dvdd=out1) parameter symbol min. typ. max. unit condition ldo11 output voltage vom110 1.176 1.200 1.224 v io=50ma output current vom11c - - 150 ma dropout voltage vom11dp - 0.03 - v io=50ma vin2=1.2v(vo=1.2v setting) input voltage stability vim11 - 2 - mv vbat=3.2v to 4.5v, io=50ma load stability vlm11 - 20 - mv io=1ma ~ 150ma vom111 1.30 vom112 1.25 vom113 1.15 programmable output voltage vom114 -2% 1.10 +2% v io=50ma discharge resistance rdchg11 - 100 - ohm ripple rejection ratio rrm11 - 70 - db vbat=4.2v+0.2vpp fr=10khz io=50ma, vo=1.20v bw=20hz to 20khz output noise level von11 - 60 - vrms io=50ma, vo=1.20v bw=20hz to 20khz output capacitor cout11 1.0 2.2 - f ta=-35 to +85 ? c, with ldo's dc bias
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 30/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 electrical characteristics (ldo12) (unless otherwise specified, ta=25 ? c, vbat=pbat*=3.6v, vin1=3.2v(fb5), vin2=1.4v(fb4), dvdd=out1) parameter symbol min. typ. max. unit condition ldo12 output voltage vom120 1.176 1.200 1.224 v io=50ma output current vom12c - - 150 ma dropout voltage vom12dp - 0.03 - v io=50ma vin2=1.2v(vo=1.2v setting) input voltage stability vim12 - 2 - mv vbat=3.2v to 4.5v, io=50ma load stability vlm12 - 20 - mv io=1ma ~ 150ma vom121 1.30 vom122 1.25 vom123 1.15 programmable output voltage vom124 -2% 1.10 +2% v io=50ma discharge resistance rdchg12 - 100 - ohm ripple rejection ratio rrm12 - 70 - db vbat=4.2v+0.2vpp fr=10khz io=50ma, vo=1.20v bw=20hz to 20khz output noise level von12 - 60 - vrms io=50ma, vo=1.20v bw=20hz to 20khz output capacitor cout12 1.0 2.2 - f ta=-35 to +85 ? c, with ldo's dc bias
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 31/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 electrical characteristics (simcard interface) (unless otherwise specified, ta=25 ? c, vbat=pbat*=3.6v, vin1=3.2v (fb5 ), vin2=1.4v (fb4), dvdd=out1) spec parameter symbol min typ max unit condition digital characteristics (digital pin: simrstin) input h level vihurst 0.7*out1 - - v input l level vilurst - - 0.2*out1 v digital characteristics (digital pin: simclkin) input h level vihuclk 0.7*out1 - - v input l level viluclk - - 0.2*out1 v max clock frequency fsimmax - - 20 mhz digital characteristics (digital pin: simiodbb) pull-up resistor rpusim 13 20 28 k ? input h level vihudbb out1-0.6 - - v (note 9) input l level viludbb - - 0.3 v (note 10) input h current linhsim - - 20 a simiodbb=out1 input l current linlsim - - 1 ma simiodbb=0.3v simio=open output h level vohudbb 0.7*out1 - - v i o =20 a output l level voludbb - - 0.4 v i in =200a, simio=0v timing parameter (cout=30pf, ldo1=ldo3=1.8v) (note 11) simrstout rise/fall time timrst - - 18 nsec simclkout rise/fall time timclk - - 18 nsec simio rise/fall time timio - - 1.0 sec simiodbb rise/fall time timiodb - - 1.2 sec (note 9) input h level is defined as the voltage at which the output (s imiodbb/simio) voltage equals 0.5v (note 10) input l level is defined as the voltage at which the output (simiodbb/simio) voltage exceeds the inpu t (simio/simiodb b) voltage by 100mv. (note 11) timing parameter specifications are guara nteed by design, but were not production tested.
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 32/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 electrical characteristics (simcard interface) (unless otherwise specified, ta=25 ? c, vbat=pbat*=3.6v, vin1=3.2v (fb5 ), vin2=1.4v (fb4), dvdd=out1) spec parameter symbol min typ max unit condition digital characteristics (digital pin: simrstout) output h level vohurstout 0.8*out3 - - v i o =200 a output l level volurstout - - 0.4 v i in =200 a digital characteristics (digital pin: simclkout) output h level vohuclkout 0.8*out3 - - v i o =200 a output l level voluclkout - - 0.4 v i in =200 a digital characteristics (digital pin: simio) pull-up resistor rpuio 6.5 10 14 k ? input h level vihuimio 0.7*out3 - - v (note 9) input l level viluimio 0 - 0.3 v (note 10) input h current linhio - - 20 a simio = out3 input l current linlio - - 1 ma simio = 0.3v output h level vohuimio 0.8*out3 - - v i o =20 a output l level voluimio - - 0.4 v i in =200 a, simiodbb=0v (note 9) input h level is defined as the voltage at which the output (s imiodbb/simio) voltage equals 0.5v (note 10) input l level is defined as the voltage at which the output (simiodbb/simio) voltage exceeds the inpu t (simio/simiodb b) voltage by 100mv.
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 33/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 electrical characteristics (4ch analog sw) (unless otherwise specified, ta=25 ? c, vbat =pbat *=3.6v, vin1=3.2v(fb5), vin2=1.4v(f b4) , dvdd=out1) spec parameter symbol min typ max unit condition 4ch analog sw input selector input range vin sw 0 - 2.2 v aswin1 aswin2 aswin3 aswin4 input leak current when off or not selected iinsw - - 1 a between aswin1 aswin2 aswin3 aswin4 and aswout on resistance when selected ronsw - 100 200 ? an asw_ en=?1? vin sw=1 .0 v electrical characteristics (clock driver) (unless otherwise specified, ta=25 ? c, vbat=pbat*=3.6v, vin1=3.2v(fb5), vin2=1.4v(fb4), dvdd=out1, vddtcxo=out7) parameter symbol min typ max unit condition clock driver tcxo_in input frequency 1 fthru1 - 19.2 - mhz tcxo_in input frequency 2 fthru2 - 26.0 - mhz t cxo_in input range vppcd 0.6 - 1.2 vpp tcxo_out output frequency1 fout1 18.2 19.2 20.2 mhz tcxo_out output frequency 2 fout2 25.0 26.0 27.0 mhz tlwcd1 20 - - ns low level cl=10pf output pulse width 1 thwcd1 20 - - ns high level cl=10pf tlwcd2 13 - - ns low level cl=10pf output pulse width 2 thwcd2 13 - - ns high level cl=10pf output rise time trcd - - 6 ns tr cl=10pf output fall time tfcd - - 6 ns tf cl=10pf
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 34/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 electrical characteristics (i2c ac characteristics) characteristics symbol min max unit clk clock frequency f clk 0 400 khz clk clock ?low? time t low 1.3 - s clk clock ?high? time t high 0.6 - s bus free time t buf 1.3 - s start condition hold time t hd.sta 0.6 - s start condition setup time t su.sta 0.6 - s data input hold time t hd.dat 0 - ns data input setup time t su.dat 100 - ns stop condition setup time t su.sto 0.6 - s clk data (input) t f t high t low t r t su.sto t su.dat t hd.dat t su.sta t hd.sta t buf figure 8. bus timing 1 clk data (input) t wr stop condition acknowledg e output write data input start condition d o figure. 9 bus timing 2
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 35/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 i 2 c bus interface the i 2 c-compatible synchronous serial interface provides access to programmable functions and registers on the device. this protocol uses a two-wire interface for bi-directi onal communication between the lsi?s connected to the bus. the two interface lines are the serial data line(data), and the serial clock line(clk). these lines should be connected to the power supply dvdd by a pull-up resistor, and remain high even when the bus is idle. 1. start and stop conditions when clk is high, pulling data low produces a start condition and pulling data high produces a stop condition. every instruction is started when a start condition occurs and terminated when a stop condition occurs. during read, a stop condition causes read to terminate and the chip enters the standby state. during write, a stop condition causes the fetching of write data to terminate, after which writing starts automatically. when writing is completed, the chip enters the standby state. two or more start conditions cannot be entered consecutively. t su .sta t hd .sta t su .sto clk data start condition stop condition figure. 10. start and stop conditions 2. modifying data data on the data input can be modified while clk is low. wh en clk is high, modification of the data input is interpreted as a start or stop condition. t su .dat t hd .dat clk data modify data modify data figure 11. modifying data
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 36/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 3. acknowledge data is transmitted and received in 8-bit units. the receiver sends an acknowledge signal by outputting a low on data in the 9th clock cycle, indicating that it has received data normall y. the transmitter releases the bus in the 9th clock cycle to receive an acknowledge signal. during write, the chip is always the receiver so that it outputs an acknowledge signal each time it has received eight bits of data. during read, the chip outputs an acknowledge signal after it receives an address following a start condition. then, it outputs read data and releases the bus to wait for an acknowledge signal from the master. when it detects an acknowledge signal, it outputs data at the next address if it does not detect a st op condition. if the chip does not detect an acknowledge signal, it stops read operation, and subsequently enters the standby state when a stop condition occurs. if the chip does not detect an acknowledge signal nor a stop condition, it keeps the bus released. clk data 18 9 data start condition acknowledge output figure 12. acknowledge 4. device addressing after a start condition occurs, a 7-bit device address and a 1-bit read/write instruction code are input into the chip the upper seven bits are called the device address, which must always be ?1001011? (adrs=l) or ?1001100? (adrs=h). the least significant bit ) read/write :(r/w indicates a read instruction when set to 1 and a write instruction when set to 0. an instruction is not executed if the device address does not match the specified value. 1001 011 device address code read/write instruction msb lsb r/w figure 13. device addressing (device address is ? 1001011? or "1001100".)
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 37/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 5. write operation in order to write to a specified address, input a device address, r/w(=0), a word address, and write data after a start condition. when a stop condition is entered, the chip automatically enters standby state. address increment is acknowledged only whenever inc bit is ?0?. xxxxxxx0 w 6 w 5 w 4 w 3 w 2 w 1 w 0 d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 m s b l s b a c k r w i n c m s b l s b a c k a c k s t a r t w r i t e s t o p device address word address write data data line address increment 0 figure 14. write operation
xxxxxxx0 w 6 w 5 w 4 w 3 w 2 w 1 w 0 d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 m s b l s b a c k r w i n c a c k a c k s t a r t w r i t e s t o p device addres s word address(n) write data(n) data line address increment d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 write data(n+1) d 5 d 4 d 3 d 2 d 1 d 0 write data(n+m) a c k address increment a c k address increment 0 figure 15. address increment on
xxxxxxx0 w 6 w 5 w 4 w 3 w 2 w 1 w 0 d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 m s b l s b a c k r w i n c a c k a c k s t a r t w r i t e s t o p device address word address(n) write data(n) data line d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 write data(n) d 5 d 4 d 3 d 2 d 1 d 0 write data(n) a c k a c k 1 figure 16. address increment off the rollover function of the lsi can be accessed when address increment is on. input a device address, ? ? 0/ ? wr , a word address ? ? n , and write data ? ? n after a start condition, in the same way as for a write byte. input write data ?? 1 ? n immediately afterwards, without entering a stop condition, and while checking that the acknowledge signal is asserted ?? 0 . when the last address (14h) is reached, the word address is rolled over to the first address (00h) of the page..
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 38/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 write operation example (auto increment off) (write to address 00h, data 32h) when writing to a single address, follow the sequence below. start => device address+write => word address => data => stop at this time, the auto increment bit (=inc) can be either ?h? or ?l?. clk data start 001111 ack=ok 000000 write 10 ack=ok 0011 00 10 ack=ok stop inc=off device address = "1001111" word address = "0000000" data = "00110010" figure 17. write operation example (auto increment off) write operation example (auto increment on) (write to address 01h, data 04h; address 02h, data a0h; address 03h, data 6eh; address 04h, data 0fh) when writing to multiple addresses follow the sequence below. start => device address+write => word address => data => data => data => data => stop at this time, the auto increment bit (=inc) needs to be ?l?. when writing the word address, write the first ad dress from which you want to start writing. ack=ok write ack=ok ack=ok inc=on ack=ok ack=ok ack=ok figure 18. write operation ex ample (auto increment on)
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 39/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 read operation example (auto increment on) (read from address 01h, 02h, 03h, 04h, 05h) to read from address 01h, you must first dummy write to address 01h. at this time, the auto increment bit (=inc) needs to be ?l?. when finished reading, you must end by returning an ack=ng(?h?), and then stop. the read sequence would be as shown below. start => device address+write => word address => stop => start => device address+read => data read + ack ok => data read + ack ok => data read + ack ok => data read + ack ok => data read + ack ng => stop ack=ok read ack=ok ack=ok ack=ok ack=ok ack=ng ack=ok write ack=ok inc=on figure 19. read operation ex ample (auto increment on)
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 40/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 register map (ldo and swreg control) address register name r/w init d7 d6 d5 d4 d3 d2 d1 d0 00h ldocnt1 r/w 1bh ldo8on ldo7on ldo6on ldo5on ldo4on ldo3on ldo2on ldo1on 01h ldocnt2 r/w 00h - - - - ldo12on ldo11on ldo10on ldo9on 02h swregcnt r/w 13h - - - swreg5on swreg4on swreg3on swreg2on swreg1on 03h ldoadj1 r/w dxh (note12) ldo2adj [3:0] ldo1adj [3:0] 04h ldoadj2 r/w c2h ldo4adj [3:0] ldo3adj [3:0] 05h ldoadj3 r/w c4h ldo6adj [3:0] ldo5adj [3:0] 06h ldoadj4 r/w 6ch ldo8adj [3:0] ldo7adj [3:0] 07h ldoadj5 r/w cch ldo10adj [3:0] ldo9adj [3:0] 08h ldoadj6 r/w 44h - ldo12adj [2:0] - ldo11adj [2:0] 09h swregadj1 r/w d4h swreg2adj [3:0] swreg1adj [3:0] 0ah swregadj2 r/w 84h swreg4adj [3:0] swreg3adj [3:0] 0bh swregadj3 r/w 0bh - - - - swreg5adj [3:0] 0ch enld_dis r/w 00h - - - - - - - enld7_dis 0dh ldopd1_dis r/w 00h ldo8pd_dis ldo7pd_dis ldo6pd_dis ldo5pd_dis ldo4pd_dis ldo3pd_dis ldo2pd_dis ldo1pd_dis 0eh ldopd2_dis r/w 00h - - - - ldo12pd_ dis ldo11pd_ dis ldo10pd_ dis ldo9pd_dis 0fh swregpd_ dis r/w 00h - - - swreg5pd_ dis swreg4pd _dis swreg3pd _dis swreg2pd _dis swreg1pd_ dis 10h anasw_cnt r/w 00h - - - - - anasw_en anasw_sel[1:0] 11h tcxo_cnt r/w 50h - tcxo_mask 2:0] - - tcxo_en tcxo_sel 12h osc_cnt r/w 03h - - - - - - c32kout_ en osc_en 13h swregpwm r/w 00h - - - swreg5 pwm swreg4 pwm swreg3 pwm swreg2 pwm swreg1 pwm 14h sw5bypass r/w 01h - reserved (note13) reserved (note13) bypass_dis - vindet5adj[2:0] (note 12) the initial value is determined by pset pin condition. (note 13) please always write ?0? to reserved registers when in use.
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 41/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 address 00h : ldocnt1 register (read/write) address (index) register name r/w bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 00h ldocnt1 r/w ldo8on ldo7on ldo6on ldo5on ldo4on ldo3on ldo2on ldo1on initial val u e 1bh 0 0 0 1 1 0 1 1 ldo7 is controlled by en_o7 pin by deafult. bit0: ldo1on ldo1 power on/off control ?0? off ?1? on (initial state) bit1: ldo2on ldo2 power on/off control ?0? off ?1? on (initial state) bit2: ldo3on ldo3 power on/off control ?0? off (initial state) ?1? on bit3: ldo4on ldo4 power on/off control ?0? off ?1? on (initial state) bit4: ldo5on ldo5 power on/off control ?0? off ?1? on (initial state) bit5: ldo6on ldo6 power on/off control ?0? off (initial state) ?1? on bit6: ldo7on ldo7 power on/off control ?0? off (initial state) ?1? on ldo7 is controllable by this register only when enld7_dis register (addr 0ch d[0]) = ?1?. bit7: ldo8on ldo8 power on/off control ?0? off (initial state) ?1? on
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 42/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 address 01h : ldocnt2 register (read/write) address (index) regis ter nam e r /w b it7 b it6 b it5 b it4 b it3 b it2 b it1 b it0 01h ldocnt2 r/w - - - - ldo12on ldo11on ldo10on ldo9on initial va l u e 00h 0 0 0 0 0 0 0 0 bit0: ldo9on ldo9 power on/off control ?0? off (initial state) ?1? on bit1: ldo10on ldo10 power on/off control ?0? off (initial state) ?1? on bit2: ldo11on ldo11 power on/off control ?0? off (initial state) ?1? on bit3: ldo12on ldo12 power on/off control ?0? off (initial state) ?1? on whenever swreg4 is used to power ldo11 and ldo12 via vin2, swreg4 must be turned on at least 250s before ldo11 and ldo12 are turned on. swreg4=on wait for 250us or more ldo11, 12=on an opposite sequence is followed for turning ldo11 and ldo12 off. ldo11 and ldo12 must be turned off before turning off swreg4. ldo11, 12=off no wait needed swreg4=off whenever swreg4 is used to power ldo11 and ldo12 via vin2, swreg4 must be turned on at least 250s before ldo11 and ldo12 are turned on. swreg4=on wait for 250us or more
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 43/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 address 02h : swregcnt register (read/write) address (index) register name r/w bit7 bit6 bi t5 bit4 bit3 bit2 bit1 bit0 02h swregcnt r/w - - - swreg5 on swreg4 on swreg3 on swreg2 on swreg1 on initial valu e 13h 0 0 0 1 0 0 1 1 bit0: swreg1on swreg1 power on/off control ?0? off ?1? on (initial state) bit1: swreg2on swreg2 power on/off control ?0? off ?1? on (initial state) bit2: swreg3on swreg3 power on/off control ?0? off (initial state) ?1? on bit3: swreg4on swreg4 power on/off control ?0? off (initial state) ?1? on bit4: swreg5on swreg5 power on/off control ?0? off ?1? on (initial state)
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 44/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 address 03h : ldoadj1 register (read/write) address (index) regis ter nam e r /w b it7 b it6 b it5 b it4 b it3 b it2 b it1 b it0 03h ldoadj1 r/w ldo2adj[3:0] ldo1adj[3:0] initial va l u e dxh 1 1 0 1 x x x x bit[3:0]: ldo1adj[3:0] ldo1 output voltage control ?0000? 1.70v ?0001? 1.75v ?0010? 1.80v (initial state when pset=?l?) ?0011? 1.85v ?0100? 1.90v ?0101? 2.50v ?0110? 2.55v ?0111? 2.60v (initial state when pset=?h?) ?1000? 2.65v ?1001? 2.70v ?1010? 2.80v ?1011? 2.90v ?1100? 2.95v ?1101? 3.00v ?1110? 3.05v ?1111? 3.10v bit[7:4]: ldo2adj[3:0] ldo2 output voltage control ?0000? 2.55v ?0001? 2.60v ?0010? 2.65v ?0011? 2.75v ?0100? 2.80v ?0101? 2.85v ?0110? 2.90v ?0111? 2.95v ?1000? 3.00v ?1001? 3.05v ?1010? 3.10v ?1011? 3.20v ?1100? 3.25v ?1101? 3.30v (initial state) ?1110? 3.35v ?1111? 3.4 0v
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 45/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 address 04h : ldoadj2 register (read/write) address (index) regis ter nam e r /w b it7 b it6 b it5 b it4 b it3 b it2 b it1 b it0 04h ldoadj2 r/w ldo4adj[3:0] ldo3adj[3:0] initial va l u e c2h 1 1 0 0 0 0 1 0 bit[3:0]: ldo3adj[3:0] ldo3 output voltage control ?0000? 1.70v ?0001? 1.75v ?0010? 1.80v (initial state) ?0011? 1.85v ?0100? 1.90v ?0101? 2.50v ?0110? 2.60v ?0111? 2.70v ?1000? 2.80v ?1001? 2.90v ?1010? 2.95v ?1011? 3.00v ?1100? 3.05v ?1101? 3.10v ?1110? 3.20v ?1111? 3.30v bit[7:4]: ldo4adj[3:0] ldo4 output voltage control ?0000? 1.10v ?0001? 1.20v ?0010? 1.30v ?0011? 1.70v ?0100? 1.80v ?0101? 1.90v ?0110? 2.50v ?0111? 2.55v ?1000? 2.60v ?1001? 2.65v ?1010? 2.70v ?1011? 2.75v ?1100? 2.80v (initial state) ?1101? 2.85v ?1110? 2.90v ?1111? 3. 00v
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 46/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 address 05h : ldoadj3 register (read/write) address (index) regis ter nam e r /w b it7 b it6 b it5 b it4 b it3 b it2 b it1 b it0 05h ldoadj3 r/w ldo6adj[3:0] ldo5adj[3:0] initial va l u e c4h 1 1 0 0 0 1 0 0 bit[3:0]: ldo5adj[3:0] ldo5 output voltage control ?0000? 1.00v ?0001? 1.05v ?0010? 1.10v ?0011? 1.15v ?0100? 1.20v (initial state) ?0101? 1.25v ?0110? 1.30v ?0111? 1.70v ?1000? 1.80v ?1001? 1.90v ?1010? 2.60v ?1011? 2.70v ?1100? 2.80v ?1101? 2.90v ?1110? 3.00v ?1111? 3.10v bit[7:4]: ldo6adj[3:0] ldo6 output voltage control ?0000? 1.10v ?0001? 1.20v ?0010? 1.30v ?0011? 1.70v ?0100? 1.80v ?0101? 1.90v ?0110? 2.50v ?0111? 2.55v ?1000? 2.60v ?1001? 2.65v ?1010? 2.70v ?1011? 2.75v ?1100? 2.80v (initial state) ?1101? 2.85v ?1110? 2.90v ?1111? 3.0 0v
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 47/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 address 06h : ldoadj4 register (read/write) address (index) regis ter nam e r /w b it7 b it6 b it5 b it4 b it3 b it2 b it1 b it0 06h ldoadj4 r/w ldo8adj[3:0] ldo7adj[3:0] initial va l u e 6ch 0 1 1 0 1 1 0 0 bit[3:0]: ldo7adj[3:0] ldo7 output voltage control ?0000? 1.10v ?0001? 1.20v ?0010? 1.30v ?0011? 1.70v ?0100? 1.80v ?0101? 1.90v ?0110? 2.50v ?0111? 2.55v ?1000? 2.60v ?1001? 2.65v ?1010? 2.70v ?1011? 2.75v ?1100? 2.80v (initial state) ?1101? 2.85v ?1110? 2.90v ?1111? 3.00v bit[7:4]: ldo8adj[3:0] ldo8 output voltage control ?0000? 1.20v ?0001? 1.30v ?0010? 1.70v ?0011? 1.80v ?0100? 2.40v ?0101? 2.45v ?0110? 2.50v (initial state) ?0111? 2.55v ?1000? 2.60v ?1001? 2.65v ?1010? 2.70v ?1011? 2.75v ?1100? 2.80v ?1101? 2.85v ?1110? 2.90v ?1111? 3.0 0v
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 48/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 address 07h : ldoadj5 register (read/write) address (index) regis ter nam e r /w b it7 b it6 b it5 b it4 b it3 b it2 b it1 b it0 07h ldoadj5 r/w ldo10adj[3:0] ldo9adj[3:0] initial va l u e cch 1 1 0 0 1 1 0 0 bit[3:0]: ldo9adj[3:0] ldo9 output voltage control ?0000? 1.10v ?0001? 1.20v ?0010? 1.30v ?0011? 1.70v ?0100? 1.80v ?0101? 1.90v ?0110? 2.50v ?0111? 2.55v ?1000? 2.60v ?1001? 2.65v ?1010? 2.70v ?1011? 2.75v ?1100? 2.80v (initial state) ?1101? 2.85v ?1110? 2.90v ?1111? 3.00v bit[7:4]: ldo10adj[3:0] ldo10 output voltage control ?0000? 1.10v ?0001? 1.20v ?0010? 1.30v ?0011? 1.70v ?0100? 1.80v ?0101? 1.90v ?0110? 2.50v ?0111? 2.55v ?1000? 2.60v ?1001? 2.65v ?1010? 2.70v ?1011? 2.75v ?1100? 2.80v (initial state) ?1101? 2.85v ?1110? 2.90v ?1111? 3.0 0v
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 49/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 ldoadj6 register (read/write) address (index) register name r/w bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 08h ldoadj6 r/w - ldo12adj[2:0] - ldo11adj[2:0] initial va l u e 44h 0 1 0 0 0 1 0 0 bit[3:0]: ldo11adj[3:0] ldo11 output voltage control ?000? 1.00v ?001? 1.05v ?010? 1.10v ?011? 1.15v ?100? 1.20v (initial state) ?101? 1.25v ?110? 1.30v ?111? 1.35v bit[7:4]: ldo12adj[3:0] ldo12 output voltage control ?000? 1.00v ?001? 1.05v ?010? 1.10v ?011? 1.15v ?100? 1.20v (initial state) ?101? 1.25v ?110? 1.30v ?111? 1.35v
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 50/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 address 09h : swregadj1 register (read/write) address (index) register name r/w bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 09h swregadj1 r/w swreg2adj[3:0] swreg1adj[3:0] initial va l u e d2h 1 1 0 1 0 1 0 0 bit[3:0]: swreg1adj[3:0] swreg1 output voltage control ?0000? 1.00v ?0001? 1.05v ?0010? 1.10v ?0011? 1.15v ?0100? 1.20v (initial state) ?0101? 1.25v ?0110? 1.30v ?0111? 1.35v ?1000? 1.40v ?1001? 1.45v ?1010? 1.50v ?1011? 1.70v ?1100? 1.75v ?1101? 1.80v ?1110? 1.85v ?1111? 1.90v bit[7:4]: swreg2adj[3:0] swreg2 output voltage control ?0000? 1.00v ?0001? 1.05v ?0010? 1.10v ?0011? 1.15v ?0100? 1.20v ?0101? 1.25v ?0110? 1.30v ?0111? 1.35v ?1000? 1.40v ?1001? 1.45v ?1010? 1.50v ?1011? 1.70v ?1100? 1.75v ?1101? 1.80v (initial state) ?1110? 1.85v ?1111? 1.9 0v
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 51/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 address 0ah : swregadj2 register (read/write) address (index) register name r/w bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 0ah swregadj2 r/w swreg4adj[3:0] swreg3adj[3:0] initial va l u e 84h 1 0 0 0 0 1 0 0 bit[3:0]: swreg3adj[3:0] swreg3 output voltage control ?0000? 1.00v ?0001? 1.05v ?0010? 1.10v ?0011? 1.15v ?0100? 1.20v (initial state) ?0101? 1.25v ?0110? 1.30v ?0111? 1.35v ?1000? 1.40v ?1001? 1.45v ?1010? 1.50v ?1011? 1.70v ?1100? 1.75v ?1101? 1.80v ?1110? 1.85v ?1111? 1.90v bit[7:4]: swreg4adj[3:0] swreg4 output voltage control ?0000? 1.00v ?0001? 1.05v ?0010? 1.10v ?0011? 1.15v ?0100? 1.20v ?0101? 1.25v ?0110? 1.30v ?0111? 1.35v ?1000? 1.40v (initial state) ?1001? 1.45v ?1010? 1.50v ?1011? 1.70v ?1100? 1.75v ?1101? 1.80v ?1110? 1.85v ?1111? 1.9 0v when this output is used to power ldo11 or ldo12 via vin2, the output must be set to meet the minimum input voltage condition.
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 52/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 address 0bh : swregadj3 register (read/write) address (index) register name r/w bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 0bh swregadj3 r/w - - - - swreg5adj[3:0] initial va l u e 0bh 0 0 0 0 1 0 1 1 bit[3:0]: swreg5adj[3:0] swreg5 output voltage control ?0000? 1.20v ?0001? 1.40v ?0010? 1.70v ?0011? 1.75v ?0100? 1.80v ?0101? 1.85v ?0110? 1.90v ?0111? 3.00v ?1000? 3.05v ?1001? 3.10v ?1010? 3.15v ?1011? 3.20v (initial state) ?1100? 3.25v ?1101? 3.30v ?1110? 3.35v ?1111? 3.40v when this output is used to power ldo1, ldo4, ldo6, ldo7, ldo8, ldo9, and ldo10 via vin1, the output must be set to meet the minimum input voltage condition.
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 53/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 address 0ch : enld_dis register (read/write) address (index) regis ter nam e r /w b it7 b it6 b it5 b it4 b it3 b it2 b it1 b it0 0ch enld_dis r/w - - - - - - - enld7_dis initial va l u e 00h 0 0 0 0 0 0 0 0 bit [0]: enld7_dis en_o7 external control pin disable register ?0? en_o7 control enabled (initial state) ?1? ldo7 controlled by ldo7on register
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 54/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 address 0dh : ldopd1_dis register (read/write) address (index) regis ter nam e r /w b it7 b it6 b it5 b it4 b it3 b it2 b it1 b it0 0dh ldopd1_dis r/w ldo8pd_ dis ldo7pd_ dis ldo6pd_ dis ldo5pd_ dis ldo4pd_ dis ldo3pd_ dis ldo2pd_ dis ldo1pd_ dis initial va l u e 00h 0 0 0 0 0 0 0 0 bit0: ldo1pd_dis ldo1 discharge resistor on/off control ?0? discharge enabled (initial state) ?1? discharge disabled bit1: ldo2pd_dis ldo2 discharge resistor on/off control ?0? discharge enabled (initial state) ?1? discharge disabled bit2: ldo3pd_dis ldo3 discharge resistor on/off control ?0? discharge enabled (initial state) ?1? discharge disabled bit3: ldo4pd_dis ldo4 discharge resistor on/off control ?0? discharge enabled (initial state) ?1? discharge disabled bit4: ldo5pd_dis ldo5 discharge resistor on/off control ?0? discharge enabled (initial state) ?1? discharge disabled bit5: ldo6pd_dis ldo6 discharge resistor on/off control ?0? discharge enabled (initial state) ?1? discharge disabled bit6: ldo7pd_dis ldo7 discharge resistor on/off control ?0? discharge enabled (initial state) ?1? discharge disabled bit7: ldo8pd_dis ldo8 discharge resistor on/off control ?0? discharge enabled (initial state) ?1? discharge disabled
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 55/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 address 0eh : ldopd2_dis register (read/write) address (index) register name r/w bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 0eh ldopd2_dis r/w - - - - ldo12pd _ dis ldo11pd_ dis ldo10pd _ dis ldo9pd_ dis initial va l u e 00h 0 0 0 0 0 0 0 0 bit0: ldo9pd_dis ldo9 discharge resistor on/off control ?0? discharge enabled (initial state) ?1? discharge disabled bit1: ldo10pd_dis ldo10 discharge resistor on/off control ?0? discharge enabled (initial state) ?1? discharge disabled bit2: ldo11pd_dis ldo11 discharge resistor on/off control ?0? discharge enabled (initial state) ?1? discharge disabled bit3: ldo12pd_dis ldo12 discharge resistor on/off control ?0? discharge enabled (initial state) ?1? discharge disabled
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 56/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 address 0fh : sw regpd_dis register (read/write) address (index) register name r/w bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 0fh swregpd_dis r/w - - - swreg5p d _dis swreg4p d _dis swreg3p d _dis swreg2p d _dis swreg1p d _dis initial va l u e 00h 0 0 0 0 0 0 0 0 bit0: swreg1pd_dis swreg1 discharge resistor on/off control ?0? discharge enabled (initial state) ?1? discharge disabled bit1: swreg2pd_dis swreg2 discharge resistor on/off control ?0? discharge enabled (initial state) ?1? discharge disabled bit2: swreg3pd_dis swreg3 discharge resistor on/off control ?0? discharge enabled (initial state) ?1? discharge disabled bit3: swreg4pd_dis swreg4 discharge resistor on/off control ?0? discharge enabled (initial state) ?1? discharge disabled bit4: swreg5pd_dis swreg5 discharge resistor on/off control ?0? discharge enabled (initial state) ?1? discharge disabled
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 57/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 address 10h : anasw_cnt register (read/write) address (index) register name r/w bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 10h anasw_cnt r/w - - - - - an asw_ e n an asw_ sel [1 :0 ] initial va l u e 00h 0 0 0 0 0 0 0 0 bit[1:0]: anasw_sel[1:0] analog switch input select control ?00? aswin1 select (initial state) ?01? aswin2 select ?10? aswin3 select ?11? aswin4 select bit2: anasw_en analog switch on/off control ?0? fixed ?l? output (initial state) ?1? output enabled
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 58/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 address 11h : tcxo_cnt register (read/write) address (index) register name r/w bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 11h tcxo_cnt r/w - tcxo_mask[2:0] - - tcxo_en tcxo_sel initial va l u e 40h 0 1 0 1 0 0 0 1 bit[0]: tcxo_sel tcxo buffer control select ?0? ldo7 on/off synchronous control (initial state) ldo7=off: tcxo=off ldo7=on: tcxo=on ?1? tcxo_en register control mode bit[1]: tcxo_en tcxo buffer on/off register control ?0? buffer off (initial state) ?1? buffer on the tcxo buffer control follows the control table shown below. tcxo_sel register tcxo_en register enld7_dis register en_o7 pin ldo7on register tcxo buffer control 0*00*off 0*01*on 0*1*0off 0*1*1on 10***off 11***on bit[6: 4]: t cxo_ mask tcxo buffer output mask length control ?000? 30us ?001? 120us ?010? 220us ?011? 310us ?100? 410us ?101? 530us (initial state) ?110? 620us ?111? 720us
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 59/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 address 12h : osc_cnt register (read/write) address (index) register name r/w bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 12h osc_cnt r/w - - - - - - c32kout _en osc_en initial va l u e 03h 0 0 0 0 0 0 1 1 bit[0]: osc_en osc on/off control ?0? oscillation off ?1? oscillation on (initial state) bit[1]: c32kout_en c32kout buffer output control ?0? buffer off ?1? buffer on (initial state)
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 60/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 address 13h : sw regpw m register (read/write) address (index) register name r/w bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 13h swregpwm r/w - - - swreg5 pwm swreg4 pwm swreg3 pwm swreg2 pwm swreg1 pwm initial va l u e 00h 0 0 0 0 0 0 0 0 bit0: swreg1pwm swreg1 pwm fixed mode enable control ?0? pfm/pwm auto mode (initial state) ?1? pw m f i xe d mod e bit1: swreg2pwm swreg2 pwm fixed mode enable control ?0? pfm/pwm auto mode (initial state) ?1? pw m f i xe d mod e bit2: swreg3pwm swreg3 pwm fixed mode enable control ?0? pfm/pwm auto mode (initial state) ?1? pw m f i xe d mod e bit3: swreg4pwm swreg4 pwm fixed mode enable control ?0? pfm/pwm auto mode (initial state) ?1? pw m f i xe d mod e bit4: swreg5pwm swreg5 pwm fixed mode enable control ?0? pfm/pwm auto mode (initial state) ?1? pw m f i xe d mod e
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 61/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 address 14h : sw5bypass register (read/write) address (index) regis ter nam e r /w b it7 b it6 b it5 b it4 b it3 b it2 b it1 b it0 14h sw5bypass r/w - reserved reserved bypass_ dis - vind e t5 ad j[2 :0 ] initial va l u e 01h 0 0 0 0 0 0 0 1 bit[2:0]: vindet5adj[2:0] swreg5 vbat bypass mode detect level ?000? 3.30v ?001? 3.35v (initial state) ?010? 3.40v ?011? 3.45v ?100? 3.50v ?101? 3.55v ?110? 3.60v ?111? 3.65v bit4: bypass_dis swreg 5 vbat byp ass mode co ntro l ?0? bypass mode enable (initial state) ?1? bypass mode disable please always write ?0? to reserved registers when in use.
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 62/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 typical characteristics 0 10 20 30 40 50 60 70 80 90 100 0.1 1 10 100 1000 output current [ma] efficiency [%] 0 10 20 30 40 50 60 70 80 90 100 0.1 1 10 100 1000 output current [ma] efficiency [%] 0 10 20 30 40 50 60 70 80 90 100 0 .1 1 10 10 0 10 0 0 outpu t c urren t [ma] efficie ncy [% ] 0 10 20 30 40 50 60 70 80 90 100 0 .1 1 10 10 0 10 0 0 outpu t c urren t [ma] efficie ncy [% ] pfm mode pwm mode vbat=3.6v ta =2 5 c output voltage = 1.2v pfm mode pwm mode vbat=3.6v ta =2 5 c output voltage = 1.8v pfm mode pwm mode vbat=3.6v ta =2 5 c output voltage = 1.2v pfm mode pwm mode vbat=3.6v ta =2 5 c output voltage = 1.4v figure 20. efficiency vs output current (swreg1 efficiency) figure 23. efficiency vs output current (swre4 efficiency) figure 21. efficiency vs output current (swreg2 efficiency) figure 22. efficiency vs output current (swreg3 efficiency)
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 63/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 typical characteristics 0 10 20 30 40 50 60 70 80 90 100 0.1 1 10 100 1000 10000 output current [ma] efficiency [%] 1.10 1.12 1.14 1.16 1.18 1.20 1.22 1.24 1.26 1.28 1.30 0 100 200 300 400 500 600 700 800 900 1000 output current [ma] output voltage [v] 1.70 1.72 1.74 1.76 1.78 1.80 1.82 1.84 1.86 1.88 1.90 0 50 100 150 200 250 300 350 400 450 500 output current [ma] output voltage [v] pfm mode pwm mode pfm mode pwm mode pfm mode pwm mode vbat=3.6v ta =2 5 c output voltage = 3.2v figure 24. efficiency vs output current (swre5 efficiency) figure 25. output voltage vs output current (swreg1 load regulation) figure 26. output voltage vs output current (swreg2 load regulation)
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 64/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 typical characteristics 1.10 1.12 1.14 1.16 1.18 1.20 1.22 1.24 1.26 1.28 1.30 0 100 200 300 400 500 600 700 800 900 1000 output current [ma] output voltage [v] 3.10 3.12 3.14 3.16 3.18 3.20 3.22 3.24 3.26 3.28 3.30 0 200 400 600 800 1000 1200 1400 o ut put curre nt [ma] output voltage [v] 1.30 1.32 1.34 1.36 1.38 1.40 1.42 1.44 1.46 1.48 1.50 0 100 200 300 400 500 output current [ma] output voltage [v] pfm mode pwm mode pfm mode pwm mode pfm mode pwm mode figure 27. output voltage vs output current (swreg3 load regulation) figure 28. output voltage vs output current (swreg4 load regulation) figure 29. output voltage vs output current (swreg5 load regulation)
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 65/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 typical characteristics 2.50 2.52 2.54 2.56 2.58 2.60 2.62 2.64 2.66 2.68 2.70 0 5 0 100 15 0 20 0 2 50 3 00 o ut put cur rent [ma] output voltage [v] 3.2 3.22 3.24 3.26 3.28 3.3 3.32 3.34 3.36 3.38 3.4 01020304050 o ut p ut c urren t [ ma] output voltage [v] figure 30. output voltage vs output current (ldo1 load regulation) figure 31. output voltage vs output current (ldo2 load regulation) figure 32. output voltage vs output current (ldo3 load regulation) 1.70 1.72 1.74 1.76 1.78 1.80 1.82 1.84 1.86 1.88 1.90 0 1 02 03 04 05 0 output current [ma] output voltage [v] figure 33. output voltage vs output current (ldo4 load regulation) 2.7 2.72 2.74 2.76 2.78 2.8 2.82 2.84 2.86 2.88 2.9 0 50 100 150 200 250 300 o ut put curre nt [ma] output voltage [v] vbat=3.6v ta=25c vin1(swreg5=3.2v)+ldo vbat=3.6v ta=25c vbat+ldo vbat=3.6v ta=25c vbat+ldovbat=3.6v vbat=3.6v ta=25c vin1(swreg5=3.2v)+ldo
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 66/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 typical characteristics vbat=3.6 v ta = 2 5 vin1(swreg5=3.2v)+ld o 1.10 1.12 1.14 1.16 1.18 1.20 1.22 1.24 1.26 1.28 1.30 0 306090120150 output current [ma] output voltage [v] figure 34. output voltage vs output current (ldo5 load regulation) figure 35. output voltage vs output current (ldo6 load regulation) 2.70 2.72 2.74 2.76 2.78 2.80 2.82 2.84 2.86 2.88 2.90 0 306090120150 output current [ma] output voltage [v] figure 36. output voltage vs output current (ldo7 load regulation) figure 37. output voltage vs output current (ldo8 load regulation) 2.70 2.72 2.74 2.76 2.78 2.80 2.82 2.84 2.86 2.88 2.90 0 102030 4050 output current [ma] output voltage [v] 2.40 2.42 2.44 2.46 2.48 2.50 2.52 2.54 2.56 2.58 2.60 0 306090120150 output current [ma] output voltage [v] vbat=3.6v ta=25c vin1(swreg5=3.2v)+ldo vbat=3.6v ta=25c vbat+ldo vbat=3.6v ta=25c vbat+ldo vbat=3.6v ta=25c vin1(swreg5=3.2v)+ldo
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 67/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 typical characteristics figure 38. output voltage vs output current (ldo9 load regulation) 2.70 2.72 2.74 2.76 2.78 2.80 2.82 2.84 2.86 2.88 2.90 0 306090120150 output current [ma] output voltage [v] figure 39. output voltage vs output current (ldo10 load regulation) 2.70 2.72 2.74 2.76 2.78 2.80 2.82 2.84 2.86 2.88 2.90 0 30 60 90 120 150 output current [ma] output voltage [v] figure 40. output voltage vs output current (ldo11 load regulation) figure 41. output voltage vs output current (ldo12 load regulation) 1.10 1.12 1.14 1.16 1.18 1.20 1.22 1.24 1.26 1.28 1.30 0 306090120150 output current [ma] output voltage [v] 1.10 1.12 1.14 1.16 1.18 1.20 1.22 1.24 1.26 1.28 1.30 0 306090120150 output current [ma] output voltage [v] vbat=3.6v ta=25c vin1(swreg5=3.2v)+ldo vbat=3.6v ta=25c vin1(swreg5=3.2v)+ldo vbat=3.6v ta=25c vin2(swreg4=1.4v)+ldo vbat=3.6v ta=25c vin2(swreg4=1.4v)+ldo
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 68/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 pcb layout guidelines to achieve the best efficiency, stability, and regul ation, it is necessary to meet following rules. 1) bypass capacitor (cpbat) should be placed as close as possible to the ic pins. 2) bypass capacitor (cpbat) should be connected by top layer. (it is better not used via) 3) the inductor (l) and output capacitor (cout) should be also placed to near side. 4) the feed back line of buck converter (fb) is wired as short as possible. 5) it is better don't place the gnd cupper trace under the chip inductor for reducing the effective of noise 6) to further reduce the noise interference on sensitive nodes use the ground plane layout. when you connect to the gnd plane, please reduce the impedance using via plurality of contacts. figure 42. schematic & pcb layout ideal image (dcdc) 7) to keep the good stability, don't placed gnd trace under the crystal. please keep the distance between the crystal and noisy device. please be as short as possible the distance of crystal and BD7185AGWL because it is a sensitive device. 8) this device includes the noisy block. (buck converter, sim interface, 32 khz oscillator) there is a possibility that these noises affe ct the other electric components of the mobile instruments. please check thoroughly with your set about the ef fect of noise. the good pcb artwork reduces the effective of noise. to prevent it from BD7185AGWL, please consider to use metal can shielding or chip bead. figure 43. schematic & pcb layout image (x?tal) shield _ osc_in os c _ ou t gndos c vddos c . 0.1uf x? tal don?t fill the copper trace.
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 69/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 pcb layout (evaluation board layout) figure 44. pcb layout image (top layer) figure 45. pcb layout image (mid1 layer) 1. bypass capacitor (cbx) should be placed as close as possible to the ic pins. 2. the lx line is wired as short as possible. cl1 cl2 cl3 cl4 cl5 l1 l2 l3 l4 l5 cb1 cb5 cdvdd cout6 cout4 cout8 cout9 cout10 cout1 crerfc cout12 cout11 cout2 cout3
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 70/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 figure 46. pcb layout image (mid2 layer) figure 47. pcb layout image (mid3 layer) 1. isolate the crystal from anything else. and do not placed gnd trace planes beneath the crystal. gnd gnd dvdd 1. isolate the crystal from anything else. and do n't placed gnd trace planes beneath the crystal. gnd gnd
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 71/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 figure 48. pcb layout image (mid4 layer) figure 49. pcb layout image (mid4 layer) 1. isolate the crystal from anything else. and do n't placed gnd trace planes beneath the crystal. gnd gnd coscin xosc coscout cvbatref cvddosc cvin1 cout5 cout7 cb3 cb4 cb2 . . 1. bypass capacitor (cbx) should be placed as close as possible to the ic pins. 2. xosc, coscin and coscout is bottom layer. it?s shielded by gnd and influence of a noise is carried out to minimization. and do not placed gnd trace planes beneath the crystal.
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 72/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 ordering information b d 7 1 8 5 a g w l - e 2 part number package gwl: ucsp50l3c packaging and forming specification e2: embossed tape and reel figure 50. ordering information physical dimension tape and reel information < tape and reel information> direction of feed embossed carrier tape 2500pcs e2 the direction is the pin 1 of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand. ucsp50l3c BD7185AGWL ta p e quantity a 5 6 g h 7 8 9 j 1 2 3 4 b c e d f 0 . 3 0 . 05 3.80. 05 a 0 . 05 a 1 pin mark s 0 . 3 0 . 0 5 b b 0 . 1 0 . 0 5 s0. 06 3 . 8 0 . 0 5 80 - 0 . 20 0 . 05 0 . 5 7 m a x p = 0 . 4 8 p=0.48 d 71801 lot no . reel direction of feed 1pin 1234 1234 1234 1234 1234 1234 a 56 g h 78 9 j 1234 b c e d f 0.30.05 3.80.05 a 0.05 a 1pin mark s 0.30.05 b b 0.10.05 s 0.06 3.80.05 80- 0.200.05 0.57max p=0.48 p=0.48 d7185a lot no.
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 73/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 operational notes 1. reverse connection of power supply connecting the power supply in reverse polarity can damage the ic. take precautions against reverse polarity whe n connecting the power supply, such as mounting an external diode between the power supply and the ic?s powe r supply terminals. 2. power supply lines design the pcb layout pattern to provide low impedance supply lines. separate the ground and supply lines of the digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog block. furthermore, connect a capacitor to ground at all power supply pins. consider the effect of temperature and aging on the capacitance value when using electrolytic capacitors. 3. ground voltage ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition. however, pins that drive inductive loads (e.g. motor driver outputs, dc-dc converter outputs) may inevitably g o below ground due to back emf or electromotive force. in such cases, the user should make sure that such voltage s going below ground will not cause the ic and the system to malfunction by examining carefully all relevant factor s and conditions such as motor characteristics, supply voltage, operating frequency and pcb wiring to name a few. 4. ground wiring pattern when using both small-signal and large-current ground traces, the two ground traces should be routed separately bu t connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal ground caused by large currents. also ensure that the ground traces of external components do not cause variation s on the ground voltage. the ground lines must be as short and thick as possible to reduce line impedance. 5. thermal consideration should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result i n deterioration of the properties of the chip. the absolute maximum rating of the pd stated in this specification is when the ic is mounted on a 54mm x 62mm glass epoxy board. in case of exceeding this absolute maximum rating, increase the board size and copper area to prevent exceeding the pd rating. 6. recommended operating conditions these conditions represent a range within which the expected characteristics of the ic can be approximatel y obtained. the electrical characteristics are guaranteed under the conditions of each parameter. 7. inrush current when power is first supplied to the ic, it is possible that the internal logic may be unstable and inrush current may flow instantaneously due to the internal powering sequence and delays, especially if the i c has more than one power supply. therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing of connections. 8. operation under strong electromagnetic field operating the ic in the presence of a strong electromagnetic field may cause the ic to malfunction. 9. testing on application boards when testing the ic on an application board, connecting a capacitor directly to a low-impedance output pin ma y subject the ic to stress. always discharge capacitors completely after each process or step. the ic?s power suppl y should always be turned off completely before connecting or removing it from the test setup during the inspectio n process. to prevent damage from static discharge, ground the ic during assembly and use similar precautions durin g transport and storage. 10. inter-pin short and mounting errors ensure that the direction and position are correct when mounting the ic on the pcb. incorrect mounting may result i n damaging the ic. avoid nearby pins being shorted to each other especially to ground, power supply and output pin. inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment ) and unintentional solder bridge deposited in between pins during assembly to name a few.
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 74/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 operational notes ? continued 11. unused input terminals input terminals of an ic are often connected to the gate of a mos transistor. the gate has extremely high impedanc e and extremely low capacitance. if left unconnected, the electric field from the outside can easily charge it. the small charge acquired in this way is enough to produce a significant effect on the conduction through the transistor an d cause unexpected operation of the ic. so unless otherwise specified, unused input terminals should be connected t o the power supply or ground line. 12. regarding the input pin of the ic this monolithic ic contains p+ isolation and p substrate layers between adjacent elements in order to keep them isolated. p-n junctions are formed at the intersection of the p layers with the n layers of other elements, creating a parasitic diode or transistor. for example (refer to figure below): when gnd > pin a and gnd > pin b, the p-n junction operates as a parasitic diode. when gnd > pin b, the p-n junction operates as a parasitic transistor. parasitic diodes inevitably occur in the structure of the ic. the operation of parasitic diodes can result in mutua l interference among circuits, operational faults, or physical damage. therefore, conditions that cause these diodes t o operate, such as applying a voltage lower than the gnd voltage to an input pin (and thus to the p substrate) shoul d be avoided. figure 50. example of monolithic ic structure 13. ceramic capacitor when using a ceramic capacitor, determine the dielectric constant considering the change of capacitance wit h temperature and the decrease in nominal capacitance due to dc bias and others. 14. area of safe operation (aso) operate the ic such that the output voltage, output current, and power dissipation are all within the area of saf e operation (aso). 15. thermal shutdown circuit(tsd) this ic has a built-in thermal shutdown circuit that prevents heat damage to the ic. normal operation should alway s be within the ic?s power dissipation rating. if however the rating is exceeded for a continued period, the junctio n temperature (tj) will rise which will activate the tsd circuit that will turn off all output pins. when the tj falls belo w the tsd threshold, the circuits are automatically restored to normal operation. note that the tsd circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under n o circumstances, should the tsd circuit be used in a set design or for any purpose other than protecting the ic from heat damage. 16. over current protection circuit (ocp) this ic incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. thi s protection circuit is effective in preventing damage due to sudden and unexpected incidents. however, the ic should not be used in applications characterized by continuous operation or transitioning of the protection circuit.
datasheet datasheet product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays . 75/75 BD7185AGWL ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz02201-0q4q0ab00010-1-2 8.apr.2014 rev.001 revision history date revision changes 2014.04.11 001 new release
datasheet datasheet notice ? ge rev.002 ? 2013 rohm co., ltd. all rights reserved. notice precaution on using rohm products 1. our products are designed and manufac tured for application in ordinary elec tronic equipments (such as av equipment, oa equipment, telecommunication equipment, home electroni c appliances, amusement equipment, etc.). if you intend to use our products in devices requiring ex tremely high reliability (such as medical equipment (note 1) , transport equipment, traffic equipment, aircraft/spacecra ft, nuclear power controllers, fuel c ontrollers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property (?specific applications?), please consult with the rohm sale s representative in advance. unless otherwise agreed in writing by rohm in advance, rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ro hm?s products for specific applications. (note1) medical equipment classification of the specific applications japan usa eu china class class classb class class class 2. rohm designs and manufactures its products subject to strict quality control system. however, semiconductor products can fail or malfunction at a certain rate. please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe desi gn against the physical injury, damage to any property, which a failure or malfunction of our products may cause. the following are examples of safety measures: [a] installation of protection circuits or other protective devices to improve system safety [b] installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. our products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditio ns, as exemplified below. accordin gly, rohm shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of an y rohm?s products under any special or extraordinary environments or conditions. if you intend to use our products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] use of our products in any types of liquid, incl uding water, oils, chemicals, and organic solvents [b] use of our products outdoors or in places where the products are exposed to direct sunlight or dust [c] use of our products in places where the products ar e exposed to sea wind or corrosive gases, including cl 2 , h 2 s, nh 3 , so 2 , and no 2 [d] use of our products in places where the products are exposed to static electricity or electromagnetic waves [e] use of our products in proximity to heat-producing components, plastic cords, or other flammable items [f] sealing or coating our products with resin or other coating materials [g] use of our products without cleaning residue of flux (ev en if you use no-clean type fluxes, cleaning residue of flux is recommended); or washing our products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] use of the products in places subject to dew condensation 4. the products are not subjec t to radiation-proof design. 5. please verify and confirm characteristics of the final or mounted products in using the products. 6. in particular, if a transient load (a large amount of load applied in a short per iod of time, such as pulse. is applied, confirmation of performance characteristics after on-boar d mounting is strongly recomm ended. avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading c ondition may negatively affect product performance and reliability. 7. de-rate power dissipation (pd) depending on ambient temper ature (ta). when used in seal ed area, confirm the actual ambient temperature. 8. confirm that operation temperat ure is within the specified range described in the product specification. 9. rohm shall not be in any way responsible or liable for fa ilure induced under deviant condi tion from what is defined in this document. precaution for mounting / circuit board design 1. when a highly active halogenous (chlori ne, bromine, etc.) flux is used, the resi due of flux may negatively affect product performance and reliability. 2. in principle, the reflow soldering method must be used; if flow soldering met hod is preferred, please consult with the rohm representative in advance. for details, please refer to rohm mounting specification
datasheet datasheet notice ? ge rev.002 ? 2013 rohm co., ltd. all rights reserved. precautions regarding application examples and external circuits 1. if change is made to the constant of an external circuit, pl ease allow a sufficient margin considering variations of the characteristics of the products and external components, including transient characteri stics, as well as static characteristics. 2. you agree that application notes, re ference designs, and associated data and in formation contained in this document are presented only as guidance for products use. theref ore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. precaution for electrostatic this product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. please take proper caution in your manufacturing process and storage so that voltage exceeding t he products maximum rating will not be applied to products. please take special care under dry condit ion (e.g. grounding of human body / equipment / solder iron, isolation from charged objects, se tting of ionizer, friction prevention and temperature / humidity control). precaution for storage / transportation 1. product performance and soldered connections may deteriora te if the products are stor ed in the places where: [a] the products are exposed to sea winds or corros ive gases, including cl2, h2s, nh3, so2, and no2 [b] the temperature or humidity exceeds those recommended by rohm [c] the products are exposed to di rect sunshine or condensation [d] the products are exposed to high electrostatic 2. even under rohm recommended storage c ondition, solderability of products out of recommended storage time period may be degraded. it is strongly recommended to confirm sol derability before using products of which storage time is exceeding the recommended storage time period. 3. store / transport cartons in the co rrect direction, which is indicated on a carton with a symbol. otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. use products within the specified time after opening a humidity barrier bag. baking is required before using products of which storage time is exceeding the recommended storage time period. precaution for product label qr code printed on rohm products label is for rohm?s internal use only. precaution for disposition when disposing products please dispose them proper ly using an authorized industry waste company. precaution for foreign exchange and foreign trade act since our products might fall under cont rolled goods prescribed by the applicable foreign exchange and foreign trade act, please consult with rohm representative in case of export. precaution regarding intellectual property rights 1. all information and data including but not limited to application example contained in this document is for reference only. rohm does not warrant that foregoi ng information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. rohm shall not be in any way responsible or liable for infringement of any intellectual property rights or ot her damages arising from use of such information or data.: 2. no license, expressly or implied, is granted hereby under any intellectual property rights or other rights of rohm or any third parties with respect to the information contained in this document. other precaution 1. this document may not be reprinted or reproduced, in whol e or in part, without prior written consent of rohm. 2. the products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of rohm. 3. in no event shall you use in any wa y whatsoever the products and the related technical information contained in the products or this document for any military purposes, incl uding but not limited to, the development of mass-destruction weapons. 4. the proper names of companies or products described in this document are trademarks or registered trademarks of rohm, its affiliated companies or third parties.
datasheet datasheet notice ? we rev.001 ? 2014 rohm co., ltd. all rights reserved. general precaution 1. before you use our pro ducts, you are requested to care fully read this document and fully understand its contents. rohm shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny rohms products against warning, caution or note contained in this document. 2. all information contained in this docume nt is current as of the issuing date and subj ec t to change without any prior notice. before purchasing or using rohms products, please confirm the la test information with a rohm sale s representative. 3. the information contained in this doc ument is provi ded on an as is basis and rohm does not warrant that all information contained in this document is accurate an d/or error-free. rohm shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information.
datasheet part number BD7185AGWL package ucsp50l3c unit quantity 2500 minimum package quantity 2500 packing type taping constitution materials list inquiry rohs yes BD7185AGWL - web page distribution inventory


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